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Ordering number : ENA0606
LB11693JH
Overview
Monolithic Digital IC
24V Fan Motor Driver IC
The LB11693JH is a three-phase brushless motor driver IC that uses a direct PWM drive technique to achieve highly efficient drive. It is optimal for driving fuel pump motors and other miniature motors.
Functions
* Soft phase switching + Direct PWM drive * PWM control based on both a DC voltage input (the CTL voltage) and a pulse input * Provides a 5V regulator output * One Hall-effect sensor FG output * Built-in integrating amplifier * Automatic recovery constraint protection circuit (on/off = 1/14), RD output * Built-in current limiter circuit * Built-in LVSD circuit * Built-in thermal protection circuit
Specifications
Absolute Maximum Ratings at Ta = 25C
Parameter Supply voltage range Output current Allowable power dissipation 1 Allowable power dissipation 2 Operating temperature Storage temperature Symbol VCC max IO max Pd max1 Pd max2 Topr Tstg T 500ms Independent IC Mounted on a specified board* Conditions Ratings 30 1.8 0.9 2.1 -40 to +85 -55 to +150 Unit V A W W C C
* Mounted on a specified board: 114.3mmx76.1mmx1.6mm, glass epoxy
Any and all SANYO Semiconductor products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircraft's control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. Consult with your SANYO Semiconductor representative nearest you before using any SANYO Semiconductor products described or contained herein in such applications. SANYO Semiconductor assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor products described or contained herein.
D1306 MS IM 20060404-S00004 No.A0606-1/12
LB11693JH
Allowable Operating Ranges at Ta = 25C
Parameter Supply voltage range Constant voltage output current RD output current FG output current Symbol VCC IREG IRD IFG Conditions Ratings 9.5 to 28 0 to -30 0 to 10 0 to 10 Unit V mA mA mA
Electrical Characteristics at Ta = 25C, VCC = VM = 24V
Ratings Parameter Current drain 1 Current drain 2 [Output Block] Output saturation voltage 1 Output saturation voltage 2 Output leakage current High side diode forward voltage 1 High side diode forward voltage 2 [5V Constant Voltage Output] Output voltage Line regulation Load regulation [Hall Amplifier] Input bias current Hall sensor input sensitivity Common-mode input voltage range Input offset voltage [CSD Pin] High-level output voltage Low-level output voltage External capacitor charge current External capacitor discharge current Charge/discharge current ratio VOH(CSD) VOL(CSD) ICSD1 ICSD2 RCSD Charge current/discharge current 2.75 0.85 -3.3 0.09 3.0 1.0 -2.4 0.17 14 3.25 1.15 -1.4 0.23 V V A A Times IB(HA) VHIN VICM VIOH Sine wave input Differential input 50mVp-p Design target value* 50 1.5 -20 2 10 350 VREG-1.0 +20 A mVp-p V mV VREG VREG1 VREG2 IO = -5mA VCC = 9.5 to 28V IO = -5 to -20mA 4.7 5.0 30 20 5.3 100 100 V mV mV VOsat1 VOsat2 IOleak VD1 VD2 ID = 0.7A ID = 1.5A 1.25 1.9 IO = 0.7A,VO(SINK)+VO(SOURCE) IO = 1.5A,VO(SINK)+VO(SOURCE) 1.5 2.2 2.05 2.9 100 1.65 2.5 V V A V V Symbol ICC1 ICC2 When STOP Conditions min typ 10 4.0 max 13.5 5.5 mA mA unit
[Undervoltage Protection Circuit (LVS Pin)] Operating voltage Release voltage Hysteresis [Current Limiter Circuit] Limiter voltage [Thermal Shutdown Operation] Thermal shutdown operating temperature Hysteresis [CTL Amplifier] Input offset voltage Input bias current Common-mode input voltage range High-level output voltage Low-level output voltage Open-loop gain VIO(CTL) IB(CTL) VICM VOH(CTL) VOL(CTL) G(CTL) ITOC = -0.2mA ITOC = 0.2mA f(CTL) = 1kHz 45 -10 -1 0 VREG-1.2 VREG-0.8 0.8 51 1.05 10 1 VREG-1.7 mV A V V V dB TSD TSD Design target value* (junction temperature) Design target value* (junction temperature) 150 170 40 C C VRF VCC-VM 0.45 0.5 0.55 V VSDL VSDH VSD 3.6 4.1 0.35 3.8 4.3 0.5 4.0 4.5 0.65 V V V
*: Design target value and no measurement was made.
Continued on next page.
No.A0606-2/12
LB11693JH
Continued from preceding page.
Ratings Parameter [PWM Oscillator Circuit] High-level output voltage Low-level output voltage Amplitude External capacitor charge current Oscillator frequency [TOC Pin] Input voltage 1 Input voltage 2 Input voltage 1L Input voltage 2L Input voltage 1H Input voltage 2H [RD Pin] Low-level output voltage Output leakage current [FG Pin] Low-level output voltage Output leakage current [FGFIL Pin] Charge current Discharge current [FG Amplifier Schmitt Block (IN1)] Amplifier gain Hysteresis [S/S Pin] High-level input voltage Low-level input voltage Input open voltage Hysteresis High-level input current Low-level input current [PWMIN Pin] Input frequency range High-level input voltage range Low-level input voltage range Input open voltage Hysteresis High-level input current Low-level input current [F/R Pin] High-level input voltage Low-level input voltage Input open voltage Hysteresis High-level input current Low-level input current VIH(FR) VIL(FR) VIO(FR) VIS(FR) IIH(FR) IIL(FR) VF/R = VREG VF/R = 0V 2.0 0 VREG-0.5 0.16 -10 -165 0.25 0 -115 VREG 1.0 VREG 0.34 10 V V V V A A f(PI) VIH(PI) VIL(PI) VIO(PI) VIS(PI) IIH(PI) IIL(PI) VPWMIN = VREG VPWMIN = 0V -170 2.0 0 2.6 0.16 2.9 0.25 100 -130 50 VREG 1.0 3.2 0.34 130 kHz V V V V A A VIH(SS) VIL(SS) VIO(SS) VIS(SS) IIH(SS) IIL(SS) VS/S = VREG VS/S = 0V -170 2.0 0 2.6 0.16 2.9 0.25 100 -130 VREG 1.0 3.2 0.34 130 V V V V A A G(FG) VIS(FG) Design target value*. Design target value*. Input equivalent 7 8 Times mV IFGFIL1 IFGFIL2 -7 3 -5 5 -3 7 A A VOL(FG) IL(FG) IFG = 5mA VFG = 28V 0.1 0.3 10 V A VOL(RD) IL(RD) IRD = 5mA VRD = 28V 0.1 0.3 10 V A VTOC1 VTOC2 VTOC1L VTOC2L VTOC1H VTOC2H Output duty: 100% Output duty: 0% Design target value*. 100% when VREG = 4.7V Design target value*. 0% when VREG = 4.7V Design target value*. 100% when VREG = 5.3V Design target value*. 0% when VREG = 5.3V 2.72 1.07 2.72 1.07 3.08 1.21 3.0 1.3 2.80 1.17 3.20 1.33 3.30 1.45 2.90 1.27 3.30 1.45 V V V V V V VOH(PWM) VOL(PWM) V(PWM) ICHG f(PWM) VPWM = 2.1V C = 2200pF 2.75 1.1 1.5 -125 15.5 3.0 1.3 1.7 -90 19.5 3.25 1.4 2.0 -70 27.0 V V Vp-p A kHz Symbol Conditions min typ max unit
*: Design target value and no measurement was made.
No.A0606-3/12
LB11693JH
Package Dimensions
unit : mm (typ) 3251
17.8 (6.2) 36 19
2.4
Pd max - Ta
Mounted on a specified board: 114.3mmx76.1mmx1.6mm glass epoxy
Allowable Power Dissipation, Pd max - W
2.1 2.0
(4.9) 7.9 10.5
1.6
1.2 0.9 0.8
(0.5)
0.8
2.0
0.3 (2.25)
0.25
0.65
1
18
Independent IC
1.09
0.4
0.47
2.45max
2.7
0.1
0 -40
-20
0
20
40
60
80
100
Ambient Temperature, Ta -C
ILB01760
SANYO : HSOP36R(375mil)
Truth Table
SourceSink IN1 1 2 3 4 5 6 OUT2OUT1 OUT3OUT1 OUT3OUT2 OUT1OUT2 OUT1OUT3 OUT2OUT3 H H H L L L F/R = "L" IN2 L L H H H L IN3 H L L L H H IN1 L L L H H H F/R = "H" IN2 H H L L L H IN3 L H H H L L
Pin Assignment
FRAME OUT2 OUT1 GND1
PWM
IN3+
IN2+
IN1+
IN3-
IN2-
IN1-
TOC
F/R
NC
NC
S/S 20 17 RD
EI+
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
19
1 NC
2 OUT3
3 NC
4 GND2
5 NC
6 NC
7 VD
8 VCC
9 VM FRAME
10 VREG
11 LVS
12 FGFIL
13 NC
14 FC
15 CSD
16 FG
18 PWMIN
Top view
No.A0606-4/12
NC
EI-
LB11693JH
Block Diagram
EI+
FG TOC FG FG CIRCUIT CSD CSD CIRCUIT
RD RD FC LVS RD LVSD VCC TSD VD Rd VM Rf
VCC
CTL
EI+
CTL AMP
PWM
PWM OSC
COMP
CURR LIM
PWMIN PWMIN
CONTROL CIRCUIT DRIVER VREF FILTER HALL AMP & MATRIX
OUT1
GND1
BGP
OUT2
5VREG
S/S
F/R
OUT3
VREG
S/S
F/R
FGFIL
VREG
IN1
IN2
IN3
GND2
Pin Functions
Pin No. 34 36 2 4 Symbol OUT1 OUT2 OUT3 GND2 Motor drive output system ground Motor drive output Pin Description Equivalent Circuit
VCC VD 300 VM 7 9
7
VD
Low side output transistor drive current supply
9
VM
Motor drive output power supply and output current detection. Connect a resistor (Rf) between this pin and VCC. The output current is limited to a value determined by the equation IOUT = VRF/Rf.
2
34 36
4
8 10
VCC VREG
Power supply (Systems other than the motor drive output) 5V regulator output Connect a capacitor (about 0.1F) between this pin and ground for stabilization.
VCC
10
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No.A0606-5/12
LB11693JH
Continued from preceding page.
Pin No. 11 Symbol LVS Pin Description Undervoltage protection voltage detection. Connect this pin to VREG if the VREG level is to be detected. If the VCC level is to be detected, insert a zener diode in series to set the detection level. Equivalent Circuit
VREG
52k 11 9.5k
12
FGFIL
FG filter. Normally, this IC will be used with this pin open. Connect a capacitor between this pin and ground if noise on the FG signal becomes a problem.
VREG
300 12
14
FC
Control loop frequency characteristics correction. Connect a capacitor between this pin and ground.
VREG
300 14
15
CSD
Constraint protection circuit operating time setting.
VREG
300 15
16
FG
One hall-effect sensor FG output. (This is an open-collector output.)
VREG 16
Continued on next page.
No.A0606-6/12
LB11693JH
Continued from preceding page.
Pin No. 17 Symbol RD Pin Description Motor constrained state detection output (This is an open-collector output.) When the motor is constrained: high, when the motor is turning: low. Equivalent Circuit
VREG 17
18
PWM IN
PWM pulse input. When low the output will be on and when high the outputs will be off. If this pin is used to control this IC, connect EI- to ground and connect EI+ to TOC.
VREG
30k 5k 18 40k
20 S/S Start/stop control. Low: start, high or open: stop.
VREG
30k 5k 20 40k
21 22 EI+ EICTL amplifier noninverting input CTL amplifier inverting input
VREG
300 21
300
22
23
TOC
PWM waveform comparator (CTL amplifier output)
VREG
23 40k PWM comparator Continued on next page. No.A0606-7/12
LB11693JH
Continued from preceding page.
Pin No. 25 Symbol PWM Pin Description PWM oscillator frequency setting. Connect a capacitor between this pin and ground. A frequency of about 20kHz can be set by using a 2200pF capacitor. Equivalent Circuit
VREG
200 2k 25
26 28 27 30 29 32 31
GND1 IN1+ IN1IN2+ IN2IN3+ IN3-
Ground (For circuits other than the motor drive output system) Hall effect sensor inputs High when IN+ > IN-, low for the reverse state. Signal inputs with an amplitude (differential) of at least 50mVp-p are desirable for the Hall inputs. If noise is a problem, connect capacitors between the IN+ and IN- inputs.
VREG
300 27 29 31
300 28 30 32
33
F/R
Forward/reverse control Low: forward, high or open: reverse.
VREG
40k 3.5k 33
1,3 5,6 13,19 24,35 FRAME Frame connection The FRAME pin is connected internally to the IC surface metal parts. Both must be used in the electrically open state. NC No connection. The NC pins may be used for wiring connections.
No.A0606-8/12
LB11693JH
LB11693JH Overview
1. Output Drive Circuit The LB11693JH reduces motor vibration and noise by switching the output current smoothly when switching phases. Since the Hall input waveform is used for the change in (slope of) the output current during phase switching, if the slope of the Hall input waveform is too steep, the change in the output current during phase switching will also be too steep and the effectiveness of this technique at lowering vibration and noise effect will be reduced. Thus the slope of the Hall input waveform requires attention during application design. Low side output transistor PWM switching is used for motor speed control. The drive output is adjusted by changing the duty. The diodes between the outputs and VM used for the regenerative current when the PWM signal is in the off state are built in. If the slope (amplitude) of the Hall input waveform is large, and if used with a high current, the parasitic diodes between the outputs and ground will operate due to the low side kickback during phase switching. If problems such as disruption of the waveforms occur, connect either rectifying diodes or Schottky diodes between the outputs and ground. 2. Power Supply Stabilization Since the LB11693JH uses a control method based on PWM switching, the power supply lines are susceptible to disruption. Electrolytic capacitors with an adequate capacitance for stabilization must be connected between VCC and ground. If diodes are inserted in the power supply lines to prevent destruction of the equipment if the power supply is connected in reverse, the power supply lines will be particularly susceptible to disruption. In this case, even larger capacitors must be used. The connected electrolytic capacitors must be located as close as possible to the IC pins (VCC, VM, and GND2). If the electrolytic capacitors cannot be attached close to the pins due to problems with the heat sink or other issues, ceramic capacitors of about 0.1F must be attached close to the pins. 3. VREG Pin At the same time as being the 5V regulator output, the VREG pin is also the power supply for the IC internal control circuits. Therefore, a capacitor of at least 0.1F must be connected between the VREG pin and ground to stabilize the control circuit power supply. The ground side of the connected capacitor must be connected to the GND1 pin with as short a line as possible. 4. FC Pin The capacitor connected to the FC pin is required to correct the control loop's frequency characteristics. (It should be about 0.1F.) 5. VD Pin The VD pin supplies the low side output transistor drive current (a maximum of about 0.1A). The IC internal power consumption is suppressed by connecting a resistor between the VCC and VD pins and dividing power consumption due to the low side output transistor drive current with that resistor. Although the IC internal power consumption due to the drive current can be reduced by lowering the VD pin voltage, a voltage of at least 4V must be assured at the VD pin. Use a resistor in the range from about 50 (0.5W) to about 100 (1W) between the VCC and VD pins when the LB11693JH is used with VCC = 24V. 6. Hall Effect Sensor Input Signals Signal inputs with an amplitude (differential) of at least 50mVp-p are required for the Hall inputs. If the output waveforms are disrupted by noise, capacitors must be connected between the Hall input pins (the + and - sides). 7. Current Limiter Circuit The current limiter circuit limits the peak value of the output current to a current determined by the equation I = VRF/Rf (where VRF = 0.5V (typical), Rf = current detection resistor value). When the limiter operates, it suppresses the current by PWM control of the low side output transistor at the PWM frequency determined by the external capacitor connected to the PWM pin, in particular, by reducing the on duty.
No.A0606-9/12
LB11693JH
8. Forward/Reverse Switching The LB11693JH was designed assuming that forward/reverse switching would not be performed while the motor is operating. We recommend that the F/R pin be held fixed at either the low (forward) or high (reverse) level when the motor is turning. Although it will be pulled up to the high level by an internal pull-up resistor (about 40k) when left open, this must be strengthened by an external resistor if fluctuations are large. If the direction is switched while the motor is turning, large currents will flow due to the braking operation. The LB11693JH's current limiter circuit, however, cannot limit this braking current. Therefore, forward/reverse switching during motor rotation is only possible if the braking current is limited to a value under IO max (1.8A) by the motor coil resistance or other circuit or phenomenon. Furthermore, since through current will flow in the high and low side transistors at the instant the switch occurs with switching that only uses the F/R pin, applications must provide a rive off period for switching directions. A drive off period must be provided by either setting the IC to the stopped state with the S/S pin or setting the PWM signal to the 0% duty state with the TOC and PWMIN pins, and the F/R pin must only be switched during that period to prevent through current. 9. Power Saving Circuit This IC can be set to a power saving state in which current consumption is reduced by setting it to the stopped state with the S/S pin. The bias current to most of the circuits in the IC is cut off in this power saving state. Note, however, that the 5V regulator output is still provided in the power saving state. 10. Notes on the PWM Frequency The PWM frequency is determined by the capacitance (F) of the capacitor connected to the PWM pin. fPWM1/ (23400xC) A frequency in the range 15 to 25kHz is desirable for the PWM frequency. The ground side of the connected capacitor must be connected to the GND1 pin by as short a line as possible. 11. Control Methods The output duty can be controlled by either of the following methods. * Comparison of the TOC pin voltage with the PWM oscillator waveform This method determines the low side output transistor duty according to the result of comparing the TOC pin voltage with the PWM oscillator waveform. The PWM duty will be 0% when the TOC pin voltage is under about 1.3V and will be 100% when that voltage is over about 3.0V. Since the TOC pin is the output of the CTL amplifier, a control voltage cannot be directly input to the TOC pin. Accordingly, the CTL amplifier is normally used as a full feedback amplifier (by connecting the EI- pin to the TOC pin) and inputting a DC voltage to the EI pin (here the TOC voltage will be equal to the EI+ pin voltage). When the EI+ pin voltage increases, the output duty will increase as well. Since the motor will be driven if the EI+ pin is in the open state, a pull-down resistor should be connected to the EI+ pin in applications where this is not desirable. A low level must be input to the PWMIN pin (or it must be connected to ground) if the TOC pin voltage control system is used. * PWMIN pulse input A 15 to 25kHz frequency pulse signal can be input to the PWMIN pin and the low side output transistor duty can be controlled based on the duty of that input signal. When the PWMIN pin is low, the output will be on, and when high, the output will be off. When the PWMIN pin is open, the input will go to the high level and the output will be off. If PWMIN pin control is used, the EI- pin must be connected to ground and the EI+ pin must be connected to the TOC pin.
No.A0606-10/12
LB11693JH
12. Undervoltage Protection Circuit The undervoltage protection circuit turns off the low side output transistor To the detected if the LVS pin voltage falls below the circuit's operating voltage (about 3.8V). power supply This operating voltage is the detection level for a 5V system. The detection level can be increased by connecting a zener diode in series with the LVS pin To the LVS pin to apply a level shift to the detection level. The current flowing into the LVS pin during detection is about 65A. To suppress variations in the zener voltage, it is necessary to stabilize the rise of the zener diode voltage by increasing the current that flows in the zener diode. If this is necessary, insert a resistor between the LVS pin and ground. When the LVS pin is open, it will be pulled to the ground level by the built-in pull-down resistor and the output will be turned off. Thus if the undervoltage protection circuit is not used, a voltage in excess of the release voltage (about 4.3V) must be applied to the LVS pin. Note that the maximum rating for the LVS pin voltage is 30V. 13. Motor Constraint Protection Circuit When motor motion is constrained, the external capacitor connected to the CSD pin will be alternately charged (up to about 3.0V) with a constant current of about 2.4A and discharged with a constant current of about 0.17A (to about 1.0V). Thus the CSD pin voltage will have a sawtooth waveform. The motor constraint protection circuit turns the motor (the low side output transistor) on or off repeatedly based on this sawtooth waveform. Motor drive will be on during the period the CSD pin external capacitor is being charged from about 1.0V to about 3.0V and will be off when it is being discharged from about 3.0V to about 1.0V. The drive on/off operation protects the IC and the motor when the motor is physically constrained from moving. If a 0.47F capacitor is connected to the CSD pin, the IC will iterate an on/off cycle in which drive is on for about 0.4 seconds and off for about 5.5 seconds. While the motor is turning, the CSD pin voltage will be held at a certain voltage (that depends on the motor speed) by (a) a CSD pin external capacitor discharge operation based on about 10s discharge pulses generated internally in the IC when the Hall input IN1 switches (that is, on rising and falling edges on the FG output) and (b) a charge operation on that capacitor by a constant current of about 2.4A. Since the Hall input IN1 does not switch when the motor is physically constrained, the discharge pulses are not generated and the CSD pin external capacitor will be charged to about 3.0V by the constant current of about 2.4A. The motor constraint protection circuit operates when the capacitor reaches about 3.0V. The constraint protection operation will be released when the motor constraint is released. If the motor speed is extremely low, the CSD pin voltage during that motor rotation will be held at a comparatively high voltage, and if that voltage reaches about 3.0V, the constraint protection function will operate. Since the constraint protection function will operate if the Hall input IN1 frequency falls below about 10Hz, caution is required when using the motor constraint protection circuit with motors that will operate at low speeds. Connect the CSD pin to ground if the motor constraint protection circuit is not used.
No.A0606-11/12
LB11693JH
Specifications of any and all SANYO Semiconductor products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer's products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer's products or equipment. SANYO Semiconductor Co., Ltd. strives to supply high-quality high-reliability products. However, any and all semiconductor products fail with some probability. It is possible that these probabilistic failures could give rise to accidents or events that could endanger human lives, that could give rise to smoke or fire, or that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. In the event that any or all SANYO Semiconductor products (including technical data,services) described or contained herein are controlled under any of applicable local export control laws and regulations, such products must not be exported without obtaining the export license from the authorities concerned in accordance with the above law. No part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written permission of SANYO Semiconductor Co., Ltd. Any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the SANYO Semiconductor product that you intend to use. Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. SANYO Semiconductor believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties.
This catalog provides information as of December, 2006. Specifications and information herein are subject to change without notice.
PS No.A0606-12/12

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